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PCF8563
Real-time clock/calendar
Rev. 9 — 16 June 2011
Product data sheet
1. General description
The PCF8563 is a CMOS
1
Real-Time Clock (RTC) and calendar optimized for low power
consumption. A programmable clock output, interrupt output, and voltage-low detector are
also provided. All addresses and data are transferred serially via a two-line bidirectional
I
2
C-bus. Maximum bus speed is 400 kbit/s. The register address is incremented
automatically after each written or read data byte.
2. Features and benefits
Provides year, month, day, weekday, hours, minutes, and seconds based on a
32.768 kHz quartz crystal
Century flag
Clock operating voltage: 1.0 V to 5.5 V at room temperature
Low backup current; typical 0.25
A
at V
DD
= 3.0 V and T
amb
= 25
C
400 kHz two-wire I
2
C-bus interface (at V
DD
= 1.8 V to 5.5 V)
Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and
1 Hz)
Alarm and timer functions
Integrated oscillator capacitor
Internal Power-On Reset (POR)
I
2
C-bus slave address: read A3h and write A2h
Open-drain interrupt pin
3. Applications
Mobile telephones
Portable instruments
Electronic metering
Battery powered products
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in
Section 18.
NXP Semiconductors
PCF8563
Real-time clock/calendar
4. Ordering information
Table 1.
Ordering information
Package
Name
PCF8563BS/4
Description
Version
SOT650-1
HVSON10 plastic thermal enhanced very thin small outline
package; no leads; 10 terminals;
body 3
3
0.85 mm
DIP8
SO8
SO8
TSSOP8
TSSOP8
plastic dual in-line package; 8 leads (300 mil)
plastic small outline package; 8 leads;
body width 3.9 mm
plastic small outline package; 8 leads;
body width 3.9 mm
plastic thin shrink small outline package; 8 leads;
body width 3 mm
plastic thin shrink small outline package; 8 leads;
body width 3 mm
Type number
PCF8563P/F4
PCF8563T/5
PCF8563T/F4
[1]
PCF8563TS/4
[2]
PCF8563TS/5
[1]
[2]
SOT97-1
SOT96-1
SOT96-1
SOT505-1
SOT505-1
Not to be used for new designs. Replacement part is PCF8563T/5.
Not to be used for new designs. Replacement part is PCF8563TS/5.
5. Marking
Table 2.
Marking codes
Marking code
8563S
PCF8563P
8563T
8563T
8563
8563
Type number
PCF8563BS/4
PCF8563P/F4
PCF8563T/5
PCF8563T/F4
PCF8563TS/4
PCF8563TS/5
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 9 — 16 June 2011
2 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
6. Block diagram
OSCI
OSCILLATOR
32.768 kHz
OSCO
MONITOR
00
(1)
DIVIDER
CLOCK OUT
CLKOUT
CONTROL
CONTROL_STATUS_1
CONTROL_STATUS_2
CLKOUT_CONTROL
01
0D
POWER ON
RESET
TIME
02
03
V
DD
V
SS
04
05
06
07
WATCH
DOG
08
VL_SECONDS
MINUTES
HOURS
DAYS
WEEKDAYS
CENTURY_MONTHS
YEARS
ALARM FUNCTION
09
0A
SDA
SCL
I
2
C-BUS
INTERFACE
0B
0C
MINUTE_ALARM
HOUR_ALARM
DAY_ALARM
WEEKDAY_ALARM
INTERRUPT
TIMER FUNCTION
INT
PCF8563
0E
0F
TIMER_CONTROL
TIMER
001aah658
(1) C
OSCO
; values see
Table 30.
Fig 1.
Block diagram of PCF8563
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 9 — 16 June 2011
3 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
7. Pinning information
7.1 Pinning
terminal 1
index area
OSCI
OSCO
n.c.
INT
V
SS
1
2
3
4
5
10 n.c.
9
V
DD
CLKOUT
SCL
SDA
OSCI
OSCO
INT
V
SS
1
2
8
7
V
DD
CLKOUT
SCL
SDA
PCF8563BS
8
7
6
PCF8563P
3
4
001aaf977
6
5
001aaf981
Transparent top view
For mechanical details, see
Figure 30.
Top view. For mechanical details, see
Figure 31.
Fig 2.
Pin configuration for HVSON10
(PCF8563BS)
Fig 3.
Pin configuration for DIP8
(PCF8563P)
OSCI
OSCO
INT
V
SS
1
2
8
7
V
DD
CLKOUT
SCL
SDA
OSCI
OSCO
INT
V
SS
1
2
3
4
001aaf976
8
7
V
DD
CLKOUT
SCL
SDA
PCF8563T
3
4
001aaf975
6
5
PCF8563TS
6
5
Top view. For mechanical details, see
Figure 32.
Top view. For mechanical details, see
Figure 33.
Fig 4.
Pin configuration for SO8
(PCF8563T)
Fig 5.
Pin configuration for TSSOP8
(PCF8563TS)
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 9 — 16 June 2011
4 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
7.2 Pin description
Table 3.
Symbol
OSCI
OSCO
INT
V
SS
SDA
SCL
CLKOUT
V
DD
n.c.
[1]
Pin description
Pin
DIP8, SO8, TSSOP8
1
2
3
4
5
6
7
8
-
HVSON10
1
2
4
5
[1]
6
7
8
9
3, 10
oscillator input
oscillator output
interrupt output (open-drain; active LOW)
ground
serial data input and output
serial clock input
clock output, open-drain
supply voltage
not connected; do not connect and do not
use as feed through
Description
The die paddle (exposed pad) is wired to V
SS
but should not be electrically connected.
8. Functional description
The PCF8563 contains sixteen 8-bit registers with an auto-incrementing register address,
an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which
provides the source clock for the Real-Time Clock (RTC) and calender, a programmable
clock output, a timer, an alarm, a voltage-low detector, and a 400 kHz I
2
C-bus interface.
All 16 registers are designed as addressable 8-bit parallel registers although not all bits
are implemented. The first two registers (memory address 00h and 01h) are used as
control and/or status registers. The memory addresses 02h through 08h are used as
counters for the clock function (seconds up to years counters). Address locations 09h
through 0Ch contain alarm registers which define the conditions for an alarm.
Address 0Dh controls the CLKOUT output frequency. 0Eh and 0Fh are the Timer_control
and Timer registers, respectively.
The Seconds, Minutes, Hours, Days, Months, Years as well as the Minute_alarm,
Hour_alarm, and Day_alarm registers are all coded in Binary Coded Decimal (BCD)
format.
When one of the RTC registers is written or read, the contents of all time counters are
frozen. Therefore, faulty writing or reading of the clock and calendar during a carry
condition is prevented.
8.1 CLKOUT output
A programmable square wave is available at the CLKOUT pin. Operation is controlled by
the register CLKOUT_control at address 0Dh. Frequencies of 32.768 kHz (default),
1.024 kHz, 32 Hz, and 1 Hz can be generated for use as a system clock, microcontroller
clock, input to a charge pump, or for calibration of the oscillator. CLKOUT is an open-drain
output and enabled at power-on. If disabled it becomes high-impedance.
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 9 — 16 June 2011
5 of 45

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