1050.PDF
(
243 KB
)
Pobierz
19-0317; Rev 1; 3/95
MAX2101 Evaluation Kit
_______________General Description
The MAX2101 evaluation kit (EV kit) simplifies the evalu-
ation of the MAX2101 quadrature digitizer. The board
is assembled with a MAX2101, supporting circuitry
such as a complete phase-locked loop, filter tuning cir-
cuitry, signal and data buffering, and supply condition-
ing for ease of characterization.
This manual provides complete instructions for using
the EV kit. Separate sections discuss board interfac-
ing, recommended test equipment, and measurement
techniques.
____________________________Features
o
ADCs Provide Greater than 5.3 Effective Bits and
f
S
= 60Msps Data Rate, f
IN
= 15MHz
o
Integrated Lowpass Filters with Variable Bandwidth
(10MHz to 30MHz)
o
On-Board Phase-Locked Loop for Generation of
Quadrature Detection Local Oscillator
(450MHz to 650MHz)
o
Buffered Baseband Signals (both I and Q) for
Ease of Demodulator Characterization
o
Buffered Baseband Data for Ease of ADC
Characterization
o
User Selectable Output Data Format
(twos complement or offset binary)
o
Programmable Counter for Variable Sample Rates
Evaluates: MAX2101
______________Ordering Information
PART
MAX2101EVKIT-SO
TEMP. RANGE
0°C to +70°C
BOARD TYPE
Surface Mount
_____________________________________________________________Component List
DESIGNATION
AR3
U21, U22
AR6
U1, U2
U3
U4
U5
U6
C1, C3–C6, C9, C10, C13–C16, C20,
C33, C35, C39, C67–C73, C88, C89,
C94, C95, C96, C101, C102, C103,
C200, C300, C301
C7, C8
C11, C12
C18, C22, C302
C21, C25, C26, C29, C31, C32, C41,
C42, C44, C46, C48, C50, C52, C58,
C65, C74, C76, C90
C27, C36, C43, C45, C47, C49, C51,
C53, C59, C60, C66, C75, C77, C91
C78, C81
C79, C80, C83, C104, C105
C82
C54, C56, C61–C64, C84–C87,
C97–C100
QTY
1
2
1
2
1
1
1
1
33
2
2
3
18
14
2
5
1
14
DESCRIPTION
Dual single-supply op amp (SO-8). Maxim MAX407CSA.
Wideband transconductance amplifiers. Maxim MAX436CSD.
OP27, low-noise op amp (SO-8). Maxim OP27GS.
Octal 3-state buffers 74ABT541 (SO-20). Texas Instruments 74ABT541DW.
Voltage regulator LM337 (TO-220). National Semiconductor LM337T.
ECL phase frequency detector MC12040 (PLCC-20). Motorola MC12040FN.
ECL triple-line receiver MC10116 (PLCC-20). Motorola MC10116FN.
6-bit quadrature digitizer MAX2101 (MQFP-100). Maxim MAX2101.
0.01µF, 20%, 50V ceramic capacitors
180pF, 5%, 50V ceramic capacitors
470pF, 5%, 100V ceramic capacitors
100pF, 10%, 50V ceramic capacitors
0.1µF, 10%, 50V ceramic capacitors
1000pF, 10%, 50V ceramic capacitors
33µF, 20%, 20V tantalum capacitors. AVX TPSD336M020R0200.
100µF, 20%, 10V tantalum capacitors. AVX TPSD107M010R0100.
10µF, 20%, 25V aluminum capacitor. Nichicon UWX1E100M.
0.22µF, 10%, 25V ceramic capacitors
1
________________________________________________________________
Maxim Integrated Products
Call toll free 1-800-998-8800 for free samples or literature.
MAX2101 Evaluation Kit
Evaluates: MAX2101
________________________________________________Component List (continued)
DESIGNATION
C92
C2, C93
D_VARI
VR100
L1, L2
L3, L4, L6, L8
R12, R13, R16–R23, R60, R69–R85
R1, R3
R4, R5, R6, R36, R58, R59
R7
R8
R25, R27, R37, R47
R11
R14, R15, R24, R26, R33, R34
R28–R31
R32, R65
R35, R61–R64, R66, R67
R48
R49, R50
R53, R54, R68
R55
R200, R201
R56
R301, R302
R38, R39, R41, R42
R40, R43
R44, R51
R45, R46
SW1
P1–P10
J1, J4, J7, J8
J2, J3, J5, J6
None
None
SH1*
QTY
1
2
1
1
2
4
28
2
6
1
1
4
1
6
4
2
7
1
2
3
1
2
1
2
4
2
2
2
1
10
4
4
1
1
1
DESCRIPTION
2.0pF to 10pF, 100V ceramic variable capacitor. Tusonix 513016 A 2.0-10.
1pF, 10%, 25V ceramic capacitors
2.0pF to 10pF, hyper-abrupt varactor diode (SOT-23). Alpha Industries 1204199
dual or M/A-COM MA45436.
12V zener diode (RV021C through-hole). Motorola 1N4742A.
8nH air-core inductors. CoilCraft A03T.
68nH, 10%, Q = 50 ceramic core inductors. CoilCraft 1206CS-680XKBC.
51Ω, 5%, 0.125W resistors
100Ω, 5%, 0.125W resistors
20kΩ, 1%, 0.125W resistors
5.6kΩ, 1%, 0.125W resistor
2.21kΩ, 1%, 0.125W resistor
4.75kΩ, 1%, 0.125W resistors
24.9Ω, 5%, 0.125W resistor
10kΩ, 5%, 0.125W resistors
47.5kΩ, 1%, 0.125W resistors
2.32kΩ, 1%, 0.125W resistors
1kΩ, 5%, 0.125W resistors
10kΩ, 25%, 0.25W variable resistor (single-turn)
2kΩ, 25%, 0.25W variable resistors (multi-turn through-hole)
200Ω, 1%, 0.125W resistors
121Ω, 1%, 0.125W resistor
221Ω, 5%, 0.125W resistors
75Ω, 1%, 0.125W resistor
500Ω, 5%, 0.125W resistors
51.1kΩ, 1%, 0.125W resistors
576Ω, 1%, 0.125W resistors
5.9kΩ, 1%, 0.125W resistors
150Ω, 1%, 0.125W resistors
Dip 6 SPST rocker switch
SMA RF connectors, 50Ω, female
0.100"/center 1x2 male square pins
0.100"/center 1x6 male square pins
MAX2101 PC board. Maxim.
MAX2101 data sheet. Maxim.
0.5" x 1.0" x 0.5" brass RF shield (not mounted). Fotofabrication.
* Optional for shielding the LO resonant tank circuit.
2
_______________________________________________________________________________________
MAX2101 Evaluation Kit
______________Component Suppliers
SUPPLIER
Alpha Industries
AVX
CoilCraft
M/A-COM
Motorola
Nichicon
Fotofabrication
Tusonix
PHONE
(617) 935-5150
(207) 282-5111
(800) 282-4975
(708) 639-6400
(617) 564-3100
(602) 655-5058
(708) 843-7500
(312) 463-6211
(602) 744-0400
FAX
(617) 935-2359
(207) 283-1941
(708) 639-1469
(617) 564-3050
(602) 655-5020
(708) 843-2798
(312) 463-3387
(602) 744-6155
Signal Connections
1) Connect the input labeled IFIN to a signal generator
through a 50Ω cable.
2) Connect the input labeled EXT’L OSC IN to a signal
generator through a 50Ω cable.
3) Connect the input labeled MASTER CLK IN to a sig-
nal generator through a 50Ω cable.
4) To use external baseband anti-aliasing filters, con-
nect the output labeled MIXOUTI to the input
labeled BBINI through a coaxial cable and the
intended filter. The filter must provide a DC signal
path from MIXOUTI to BBINI. Follow the same
procedure for the MIXOUTQ and BBINQ connec-
tions.
5) Connect the output labeled PLL TP to a frequency
counter, an oscilloscope, or a spectrum analyzer,
through a terminated 50Ω cable.
6) To characterize the time domain characteristics of
the analog baseband signals, connect the output
labeled BBOUTI to channel 1 of an oscilloscope
through a terminated 50Ω cable, and connect the
output labeled BBOUTQ to channel 2 of the same
oscilloscope through a terminated 50Ω cable. This
will facilitate analysis of the quadrature detection
network.
7) To characterize the frequency domain characteris-
tics of the analog baseband signal, connect the out-
put labeled BBOUTI (or BBOUTQ) to a spectrum
analyzer through a terminated 50Ω cable.
8) Connect the outputs labeled DATA OUT I, DATA
CLK OUT, REF CLK OUT, and DATA OUT Q to a
logic analyzer through a flexible 3MΩ cable with
2x20, 0.1" center female headers. Note that jumpers
J2, J4, J6, and J8 are connected to ground to real-
ize an efficient ground-return connection for the
high-speed digital signals. The cable assembly
should use alternating signal-ground assignments,
connecting the data line’s adjacent ground wire to
the associated ground pin on the EV board. The
cable assembly should be shielded. It is important
that the grounded jumpers be connected as part of
the logic analyzer interface cable.
Evaluates: MAX2101
__________Test Equipment Required
Signal Generators
Input (IFIN):
400MHz to 700MHz frequency range
(two sources necessary for intermodulation
measurements)
LO Reference Oscillator:
20MHz to 50MHz frequency range
Master Sample Clock:
Under 1MHz to over 60MHz frequency range
Measurement Equipment
Oscilloscope:
Over 200MHz bandwidth, Tektronix TDS 460
Logic Analyzer:
Over 100MHz data rate, Tektronix 3001HSM
(200 channels @ 200MHz)
____________________Getting Started
The MAX2101 EV kit is fully assembled and tested. To
verify board functionality and proceed with evaluation,
follow these start-up instructions.
Do not turn on the
power supply until all connections are completed.
Power-Supply Connections
1) Connect a +15V supply to the pad marked +15V.
2) Connect a -15V supply to the pad marked -15V.
3) Connect a +5V supply to the pad marked +5V.
Verify the supply is capable of sourcing 500mA of
current, as noted on the board.
4) Connect a -5.2V supply to the pad marked -5.2V.
5) Connect power-supply ground to the pad marked
GROUND.
Initial Conditions
The MAX2101 EV kit comes tested and set to certain
initial conditions, as stated in Table 1.
_______________________________________________________________________________________
3
MAX2101 Evaluation Kit
Evaluates: MAX2101
Table 1. MAX2101 EV Kit Initial Conditions
PARAMETER
External Oscillator In (P8)
Automatic Gain Control
Filter Cutoff Frequency
Filter Temperature-Coefficient Adjustment
Programmable Sample Rate
Filter Select
Offset Correction Enable
Data Format Select
SETTING
35MHz (LO = 560MHz)
Set for IF IN power of -30dBm
20MHz
0TC at 20MHz
Maximum Sample Rate
Internal Filters
Enabled
Offset Binary
C92
R50
R49
R48
S0, S1, S2 = 0
FLTRSEL = 0
ENOPB = GND
BINEN = 1
ADJUSTMENT
Analysis
1) Select all user settings (note that the EV board has
been adjusted to the initial conditions found in
Table 1): (a) ENOPB should normally be enabled,
i.e. set to ground. (b) Determine the sample rate by
setting S0, S1, and S2, referring to the Sample-Rate
Control table (Table 1) in the MAX2101 data sheet.
For maximum sample rate, set all inputs to logic low.
(c) Select the baseband signal path (internal or
external) by setting the FLTRSEL switch. For inter-
nal signal path, set FLTRSEL to logic low. For exter-
nal signal path, set FLTRSEL to logic high. (d)
Select the digitized baseband data format by setting
BINEN. For twos-complement format, set BINEN to
logic low. For offset binary format, set BINEN to
logic high.
2) Establish LO: (a) Choose the desired LO frequency,
f
LO
; for this EV kit, the LO should be between 450MHz
and 650MHz. The MAX2101 EV kit has been factory
preset for a LO frequency of 560MHz. (b) Divide f
LO
by 16 to determine the External Reference Oscillator
Frequency, f
REF
:
f
REF
= f
LO /
16
(c) Apply f
REF
to the EXT’L OSC IN port, with a
power level between -10dBm and 0dBm.
3) Establish the input and output signals: (a) Choose a
baseband frequency, f
BB
; for the MAX2101 EV kit,
the frequency should be between 10kHz and
30MHz. (b) Determine the input frequency, f
IN
, by
adding or subtracting f
BB
from f
LO
:
f
IN
= f
LO
±f
BB
(c) Choose a signal power for the input signal, f
IN
;
for the MAX2101, the power should be between
-50dBm and -10dBm. (c) Apply f
IN
to the IFIN port.
4) Apply power to the board. Note the following supply
sequence: (a) Turn on the +15V and -15V supplies.
(b) Turn on the -5.2V supply. (c) Turn on the +5V
supply. (d) Measure the voltage at Test Point 3,
VREF; this voltage should be between 1.18V and
1.26V. (e) Adjust the variable capacitor, C92, until
the frequency measured at the PLL TP output
equals f
REF
. (f) Verify the phase-locked loop is
active by measuring the voltage at the output of the
loop filter, at C13; this voltage should be between
0V and +11V. (g) If the loop is not locked, adjust
capacitor C92, while periodically shorting the left
node of VR100 to ground, until the loop locks. (h)
Adjust the filters to ensure they are not attenuating
the baseband signal by adjusting the FTUNE
ADJUST potentiometer until the voltage measured
on the rectangular pad next to R12 is greater than
3V. (i) Verify the correct baseband frequency by
measuring the BBOUTI or BBOUTQ signal. (j)
Adjust the AGC ADJUST potentiometer until the
peak-to-peak amplitude of the signal at BBOUTI or
BBOUTQ is 500mVp-p. (k) Adjust the FTUNE
ADJUST potentiometer until the signals at BBOUTI
and BBOUTQ are attenuated between 0% and 5%.
(l) As a final check for proper operation, measure
the voltage on OFFI by probing the left node of
capacitor C97, and measure the voltage on OFFQ
by probing the left node of capacitor C100. The
measured voltages should be in the 1.5V to 3.5V
range.
5) Acquire signals: (a) Measure all signals associated
with DATA CLK OUT, DATA OUT I, and DATA OUT
Q to verify proper logic levels. (b) Using the DATA
CLK OUT signals as the synchronizing clock,
acquire data at DATA OUT I and DATA OUT Q with
a logic analyzer. Note the data frequency and edge
4
_______________________________________________________________________________________
MAX2101 Evaluation Kit
rate require proper high-speed design techniques
to ensure proper data transmission. Each data pin
has an associated ground pin. The data line should
be AC terminated in the cable’s characteristic
impedance. Analysis may now be performed in the
digital domain.
6) The analog quadrature demodulator front end may
be analyzed by measuring signals at various ports.
The analog baseband signals can be measured at
the BBOUTI and BBOUTQ ports. The video ampli-
fiers buffering BBOUTI and BBOUTQ can drive a
ground referenced 50Ω load, such as a high-speed
oscilloscope probe. The mixer output signals can be
measured at MIXOUTI and MIXOUTQ. Select the
external signal path with the FLTRSEL control to mea-
sure MIXOUTI and MIXOUTQ. The MAX2101 can
drive a back-terminated AC-coupled impedance of
50Ω at this port. The AGC should be adjusted to pro-
vide -22dBm from MIXOUTI and MIXOUTQ, ensuring a
full-scale signal at the BBINI and BBINQ ports.
Measurements at these ports facilitate analysis of the
IF front end and the quadrature demodulation net-
works, without adding effects due to baseband filters
and amplifiers.
Inputs/Outputs
RF Input (P7).
Accepts a 400MHz to 700MHz signal,
depending on the coarse setting of the resonant-tank
variable capacitor. Signal level can be from -50dBm to
-10dBm. Signal is DC referenced to ground, and is AC
coupled through an impedance matching network to
the MAX2101’s IFIN input.
I and Q Channel Mixer Outputs (MIXOUTI/Q) (P4,
P5).
Intended to drive a lowpass filter, which drives the
appropriate baseband input. Output is capable of dri-
ving 100Ω referenced to 2.4V.
I and Q Channel Baseband Inputs (BBINI/Q) (P1, P6).
Accepts the filtered, downconverted signal from the
appropriate mixer output port. Driving signal must
be DC referenced to 2.4V. Signal level should be
nominally 18mV, or -22dBm from a 50Ω source resis-
tance.
I and Q Channel Analog Baseband Outputs
(BBOUTI/Q) (P2, P3).
The analog baseband signals
prior to digitizing. The internal baseband signals are
buffered, converted from differential to single-ended
format, attenuated, and translated to ground reference.
This signal is capable of driving 50Ω for ease of evalua-
tion.
LO Reference Oscillator In (P8).
This port accepts
the external oscillator that determines the LO frequen-
cy. The LO frequency will be 16 times the reference
signal frequency. To realize a LO frequency range of
400MHz to 700MHz, the external oscillator must supply
a frequency range of 25MHz to 43.75MHz. The signal
level should be between -7dBm and +5dBm from a
50Ω source resistance. The source should exhibit
extremely low phase noise (better than -90dBc at
10kHz off the carrier) to ensure optimum phase-noise
performance of the LO.
Phase-Lock-Loop Test Point (P10).
Test point for exam-
ining the output of the MAX2101 prescaler. Capable of
driving a low-impedance load directly (R
L
= 50Ω).
Master Clock In (MCLK) (P9).
Port for accepting the
master sample-clock signal. Signal level must be
between 0dBm and +10dBm. Signal should exhibit low
jitter characteristics (<40ps) to ensure proper sample
jitter on the digitized data.
Reference Clock Out (RCLK) (J7, J8).
Buffered out-
put port from the MAX2101 providing a low-jitter replica
of the master clock, divided by 6 in frequency. Output
clock is in TTL/CMOS format.
Evaluates: MAX2101
Resonator Shield
The MAX2101 EV kit includes a shield to prevent EMI
from pulling the resonator frequency or introducing noise
into the resonator signal. You may attach the shield over
the resonator network after setting the desired LO fre-
quency (by adjusting C92). Attach the shield by (a)
forming the shield following the indentations provided,
and (b) soldering the shield to the grounded contact
surrounding the resonator tank. If further adjustment of
C92 is required, simply drill a hole into the shield, placed
over the trimmer capacitor, with a diameter just large
enough to allow insertion of a tool.
______Board Interface Descriptions
Power Supplies
+5V ±5%, 500mA.
Provides power for the MAX2101,
the data buffers, and the single-supply op amps.
-5.2V ±5%, 50mA.
Provides power for MC10116 line
receiver and MC12040 phase frequency detector.
Ground ±50mV.
+15V or -15V ±10%, 10mA.
Provides power for the
phase-locked-loop op amp (AR6).
_______________________________________________________________________________________
5
Plik z chomika:
Kot_Maciek
Inne pliki z tego folderu:
0001.PDF
(10 KB)
1003.PDF
(374 KB)
1002.PDF
(139 KB)
1004.PDF
(342 KB)
1005.PDF
(170 KB)
Inne foldery tego chomika:
PDF2
PDF3
SPICE
Zgłoś jeśli
naruszono regulamin