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TPS3510,TPS3511
PC POWER SUPPLY SUPERVISORS
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
D
Overvoltage Protection and Lockout for
D
D
D
D
D
D
D
D
D
12 V, 5 V, 3.3 V
Undervoltage Protection and Lockout for
5 V and 3.3 V
Fault Protection Output With Open-Drain
Output Stage
Open-Drain Power Good Output Signal for
Power Good Input, 3.3 V and 5 V
Power Good Delay; 300-ms TPS3510,
150-ms TPS3511
75-ms Delay for 5-V and 3.3-V Power
Supply Short-Circuit Turnon Protection
2.3-ms PSON Control to FPO Turnoff Delay
38-ms PSON Control Debounce
73-µs Width Noise Deglitches
Wide Supply Voltage Range From 4 V
to 15 V
PGI
GND
FPO
PSON
D OR P PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
PGO
V
DD
VS5
VS33
description
The TPS3510/1 is designed to minimize external components of personal-computer switching power supply
systems. It provides protection circuits, power good indicator, fault protection output (FPO) and PSON control.
Overvoltage protection (OVP) monitors 3.3 V, 5 V, and 12 V (12-V signal detects via V
DD
pin). Undervoltage
protection (UVP) monitors 3.3 V and 5 V. When an OV or UV condition is detected, the power good output (PGO)
is set to low and FPO is latched high. PSON from low to high resets the protection latch. UVP function is enabled
75 ms after PSON is set low and debounced. Furthermore, there is a 2.3-ms delay (and an additional 38-ms
debounce) at turnoff. There is no delay during turnon.
Power good feature monitors PGI, 3.3 V and 5 V and issues a power good signal when the output is ready.
The TPS3510/1 is characterized for operation from –40°C to 85°C.
typical application
5 VSB
PGI
PGO
12 V
1
8
PGO
PGI
2
7
VDD
GND
3
6
VS5
FPO
4
5
PSON VS33
0.5 V
Drop
VSB
5V
3.3 V
PSON
(From Motherboard)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2002, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
TPS3510,TPS3511
PC POWER SUPPLY SUPERVISORS
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
FUNCTION TABLE
PGI
<0.95 V
<0.95 V
<0.95 V
0.95 V<PGI<1.15 V
0.95 V<PGI<1.15 V
0.95 V<PGI<1.15 V
PGI > 1.15 V
PGI > 1.15 V
PGI > 1.15 V
x
PSON
L
L
L
L
L
L
L
L
L
H
UV CONDITION
(3.3 V OR 5 V)
no
no
yes
no
no
yes
no
no
yes
x
OV CONDITION
(3.3 V, 5 V, OR 12 V)
no
yes
no
no
yes
no
no
yes
no
x
FPO
L
H
L
L
H
H
L
H
H
H
PGO
L
L
L
L
L
L
H
L
L
L
x = don’t care
FPO = L means: fault IS NOT latched
FPO = H means: fault IS latched
PGO = L means: fault
PGO = H means: NO fault
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TPS3510,TPS3511
PC POWER SUPPLY SUPERVISORS
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
functional block diagram
VDD
12 V OV
+
_
POR
VS5
R
5 V OV
+
_
73-µs
Debounce
S
Q
FPO
VS33
73-µs
Debounce
2.3-ms
Delay
VDD
3.3 V OV
+
_
38-ms
Debounce
PSON
3.3 V UV
+
_
5 V UV
+
_
+
_
PGI1
150-µs
Debounce
75-ms
Delay
VDD
PGO
Delay†
Band-Gap
Reference
1.15 V
PGI
PGI2
+
_
Band-Gap
Reference
0.95 V
150-µs Debounce
and
4.8-ms Delay
† 300 ms for TPS3510 and 150 ms for TPS3511
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
TPS3510,TPS3511
PC POWER SUPPLY SUPERVISORS
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
timing diagram
VDD
PSON
FPO
PGI
3.3 V, 5 V
12 V
PGO
td1
tb
td1
td2
Protect
Occur
PSON
On
PSON Off
PSON
On
AC Off
td1
PG OFF
Delay
Terminal Functions
TERMINAL
NAME
FPO
GND
PGI
PGO
PSON
VDD
VS33
VS5
NO.
3
2
1
8
4
7
5
6
I
O
I
I
I
I
I/O
O
DESCRIPTION
Inverted fault protection output, open drain output stage
Ground
Power good input
Power good output, open drain output stage
ON/OFF control
Supply voltage/12 V overvoltage protection input pin
3.3 V over/undervoltage protection
5 V over/undervoltage protection
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TPS3510,TPS3511
PC POWER SUPPLY SUPERVISORS
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
detailed description
power good and power good delay
A PC power supply is commonly designed to provide a power-good signal, which is defined by the computer
manufacturers. PGO is a power-good signal and should be asserted high by the PC power supply to indicate
that the 5-V and 3.3-V outputs are above the under-voltage threshold limit. At this time the converter should be
able to provide enough power to ensure continuous operation within the specification. Conversely, when either
the 5-V or the 3.3-V output voltages fall below the under-voltage threshold, or when ac power has been removed
for a time sufficiently long so that power supply operation is no longer ensured, PGO should be de-asserted to
a low state.
Figure 1 represents the timing characteristics of the power good (PGO), dc enable (PSON), and the 5 V/3.3 V
supply rails.
PSON
On
Off
75%
5-V/3.3-V
Output
PGO
t5
t3
t2
t4
10%
Figure 1. Timing of PSON and PGO
Although there is no requirement to meet specific timing parameters, the following signal timings are
recommended:
2 ms
≤
t2
≤
20 ms, 100 ms < t3 < 2000 ms, t4 > 1 ms, t5
≤
10 ms
Furthermore motherboards should be designed to comply with the previously recommended timing. If timings
other than these are implemented or required, this information should be clearly specified.
The TPS3510/1 family of power-supply supervisors provides a power-good output (PGO) for the 3.3-V and 5-V
supply voltage rails and a separate power-good input (PGI). An internal timer is used to generate a power-good
delay. If the voltage signals at PGI, VS33, and VS5 rise above the under-voltage threshold, the open-drain
power-good output (PGO) goes high after a delay of 150 ms or 300 ms. When the PGI voltage or either the 3.3-V
and 5-V power rails drops below the under-voltage threshold, PGO is disabled immediately (after 150-µs
debounce).
power supply remote on/off (PSON) and fault protect output (FPO)
Since the latest personal computer generation focuses on easy turnon and power saving functions, the PC
power supply requires two characteristics. One is a dc power supply remote on/off function, the other is standby
voltage to achieve very low power consumption of the PC system. Thus the main power needs to be shut down.
The power supply remote on/off (PSON) is an active low signal that turns on all of the main power rails including
3.3 V, 5 V, –5 V, 12 V, and –12 V power rails. When this signal is held high by the PC motherboard or left open
circuited, the signal of the fault protect output (FPO) also goes high. Thus, the main power rails should not deliver
current and should be held at 0 V.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
5

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