clock(1).pdf

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5
4
3
2
1
5V
D
D
10K
U2
Y2
32.768 KHz
1
2
X1
X2
SCL
SDA
SQW/OUT
GND
6
5
7
R3 R4
10K
31
40
U1
1
2
P1.0
P1.1
R5
10K
R6
10K
R7
10K
R8
10K
SW1
Time set key
Alarm set key
C
BT1
3V Li battery
3
8
VBAT
VCC
DS1307
6
7
8
39
38
37
36
35
34
33
32
9
19
Y1
11.0592 MHz
18
C1
10uF
R1
10K
C2
GND
33pF
C3
33pF
ALE/PROG
PSEN
P3.4/T0
P3.0/RXD
P3.1/TXD
P1.5
P3.2/INT0
P1.6
P3.3/INT1
P1.7
P1.3
P1.2
P1.4
P0.0/AD0
P0.1/AD1
P0.2/AD2 P2.7/A15
P0.3/AD3 P2.6/A14
P0.4/AD4 P2.5/A13
P0.5/AD5 P2.4/A12
P0.6/AD6 P2.3/A11
P0.7/AD7 P2.2/A10
P2.1/A9
RST
P2.0/A8
XTAL1
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
20
AT89C51
30
29
14
10
11
12
13
4
3
5
28
27
26
25
24
23
22
21
15
16
17
EA/VPP
VCC
SW2
SW3
J1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2x16 LCD
SW4
Increment value
C
Decrement value
4
LS1
1
2
Negative
Alarm Buzzer
Positive
R2
B
1K
B
Designed By: Ajay Bhargav
Email:
ajay_bhargav@hotmail.com
WWW:
www.rickeyworld.tk
A
A
Title
Schematic For Digital Clock With Alarm
Size
A
Date:
5
4
3
Document Number
1
Wednesday, April 26, 2006
2
Rev
1.0b
Sheet
1
1
of
1

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