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TDA9105

DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

PRELIMINARY DATA

VERTICAL

VERTICAL RAMP GENERATOR

50 TO 165Hz AGC LOOP

DCCONTROLLED V-AMP V-POS,S-AMP &C-COR

ON/OFF SWITCH

EWPCC

VERTICAL PARABOLA GENERATOR WITH

DC CONTROLLED KEYSTONE & AMPLITUDE

AUTO TRACKING WITH V-POS & V-AMP

GEOMETRY

WAVE FORM GENERATOR FOR PARALEL-

LOGRAM & SIDE PIN BALANCE CONTROL

AUTO TRACKING WITH V-POS & V-AMP

DYNAMIC FOCUS

VERTICAL PARABOLA OUTPUT FOR VERTI-

CAL DYNAMIC FOCUS

AUTO TRACKING WITH V-POS & V-AMP

GENERAL

ACCEPT POSITIVE OR NEGATIVE HORI-

ZONTAL & VERTICAL SYNC POLARITIES

SEPARATE H & V TTL INPUT

COMPOSITE BLANKING OUTPUT

HORIZONTAL

DUAL PLL CONCEPT

150kHz MAXIMUM FREQUENCY

SELF-ADAPTATIVE

X-RAY PROTECTION INPUT

DC ADJUSTABLE DUTY-CYCLE

PLL LOCK /UNLOCK INFORMATION

WIDE RANGE DC CONTROLLED H-POSI-

TION

ON/OFF SWITCH (FOR PWR MANAGE-

MENT)

TWO H-DRIVE POLARITIES

MOIRE OUTPUT

This IC controls all the functions related to the

horizontal and vertical deflection in multimodes or

multisync monitors.

This IC, combined with TDA9205 (RGB preamp),

STV942x (OSD processor), ST727x (micro control-

ler) and TDA817x (vertical booster), allows to real-

ize very simple and high quality multimodes or

multisync monitors.

SHRINK42

(Plastic Package)

ORDER CODE :

TDA9105

PIN CONNECTIONS

V-F OCUS

H-LOC KOUT

P LL2C

H-DUTY

H-F LY

H-G ND

H-R EF

FC2

FC1

P LL1F

H-LOC KCAP

P LL1INHIB

H-P OS

XRAY-IN

H-S YNC

S P INBAL

KEYBAL

GEOMOUT

EWAMP

KEYS T

EWO UT

V-FLY

VDCIN

V-S YNC

V-P OS

VDCO UT

V-AMP

V-OUT

C-CORR

VS-AMP

V-CAP

V-RE F

V-AGCCAP

V-GND

9105-01.EPS

DESCRIPTION

The TDA9105 is a monolithic integrated circuit

assembled in a 42 pins shrink dual in line plastic

package.

June 1996

GND

H-O UTE M

H-O UTC OL

MOIRE

BLK-OUT

1/32

This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice.

TDA9105

PIN DESCRIPTION

Name

V-FOCUS

H-LOCKOUT

PLL2C

H-DUTY

Function

Vertical Dynamic Focus Output

First PLL Lock/Unlock Output

Second PLL Loop Filter

DC Control of Horizontal Drive Output Pulse Duty-cycle. If this Pin is grounded, the Horizontal

and Vertical Outputs are inhibited. By connecting a Capacitor on this Pin a Soft-start function

may be realized on H-drive Output.

Horizontal Flyback Input (positive polarity)

Horizontal Section Ground

Horizontal Section Reference Voltage, must be filtered

VCO Low Threshold Filtering Capacitor

VCO High Threshold Filtering Capacitor

Horizontal Oscillator Capacitor

Horizontal Oscillator Resistor

First PLL Loop Filter

First PLL Lock/Unlock Time Constant Capacitor. When Frequency is changing, a Blanking

Pulse is generated on Pin 23, the duration of this Pulse is proportionnel to the Capacitor on

Pin 13.

TTL-Compatible Input for PLL1 Output Current Inhibition

DC Control for Horizontal Centering

X-RAY protection Input (with internal latch function)

TTL compatible Horizontal Sync Input

Supply Voltage (12V Typ.)

Ground

Horizontal Drive Output (emiter of internal transistor)

Horizontal Drive Output (open collector of internal transistor)

Blanking Output, activated during frequency changes, when X-RAY Input is triggered, when

VS is too low, or when Device is in stand-by mode (through H-DUTY Pin 2) and during H-FLY,

V-FLY, V-SYNC, VSawth retrace.

Moire Output

Vertical Section Signal Ground

Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator

Vertical Section Reference Voltage

Vertical Sawtooth Generator Capacitor

DC Control of Vertical S-Shape Amplitude

DC Control of Vertical C-Correction

Vertical Ramp Output (with frequency independant amplitude and S-Correction)

DC Control of Vertical Amplitude Adjustment

Vertical Position Reference Voltage Output

DC Control of Vertical Position Adjustment

TTL-Compatible Vertical Sync Input

Geometric Correction Reference Voltage Input

Vertical Flyback Input (positive polarity)

East /West Pincushion Correction Parabola Output

DC Control of Keystone Correction

DC Control East/West Pincushion Correction Amplitude

Side Pin Balance & Parallelogram Correction Parabola Output

DC Control of Parallelogram Correction

DC Control of Side Pin Correction Amplitude

H-FLY

H-GND

H-REF

FC2

FC1

PLL1F

H-LOCKCAP

PLL1INHIB

H-POS

XRAY-IN

H-SYNC

GND

H-OUTEM

H-OUTCOL

BLK OUT

MOIRE

V-GND

V-AGCCAP

V-REF

V-CAP

VS-AMP

C-CORR

V-OUT

V-AMP

VDCOUT

V-POS

V-SYNC

VDCIN

V-FLY

EWOUT

KEYST

EWAMP

GEOMOUT

KEYBAL

SPINBAL

2/32

9105-01.TBL

BLOCK DIAGRAM

H-POS

PLL1F

FC2

FC1

H-FLY

PLL2C

H-LOCKOUT

XRAY-IN

H-DUTY

H-OUTCOL

H-REF

H-Sync

MOIRE

V-Sync

GND

MOIRE

V-REF

VCO

PHASE

COMP

PHASE

SHIFTER

PULSE

SHAPER

OUTPUT

BUFFER

H-GND

PHASE

FREQUENCY

COMP

H-OUTEM

H-SYNC

PULSE

SHAPER

POL

DETECT

LOCK

UNLOCK

IDENT

VIDEO UNLOCK

SAFETY

PROCESSOR

V-FOCUS

KEYST

PLL1INHIB

PLL1

INHIB

H-LOCKCAP

EWOUT

V-REF

V-MID

EWAMP

KEYBAL

V-GND

VERT OSC

RAMP

GENERATOR

H-FLY

V-SYNC

PULSE

SHAPER

POL

DETECT

CORR

BLK

GEN

GEOMOUT

TDA9105

SPINBAL

VCAP

V-OUT

V-POS

V-FLY

VS-AMP

C-CORR

V-AMP

VDCOUT

VAGCCAP

BLK-OUT

VDCIN

TDA9105

3/32

9105-02.EPS

TDA9105

QUICK REFERENCE DATA

Parameter

Horizontal Frequency

Autosynch Frequency (for Given R0, C0)

Hor Sync Polarity Input

Compatibility with Composite Sync on H-SYNC Input

Lock/Unlock Identification on 1 PLL

DC Control for H-Position

X-RAY Protection

Hor DUTY Adjust

Stand-by Function

Two Polarities H-Drive Outputs

Supply Voltage Monitoring

PLL1 Inhibition Input

Composite Blanking Output

Horizontal Moire Output

Vertical Frequency

Vertical Autosync (for 150nF)

Vertical S-Correction

Vertical C-Correction

Vertical Amplitude Adjustment

Vertical Position Adjustment

East/West Parabola Output

PCC (Pin Cushion Correction) Amplitude Adjustment

Keystone Adjustment

Dynamic Horizontal Phase Control Output

Side Pin Balance Amplitude Adjustment

Parallelogram Adjustment

Tracking of Geometric Corrections with V-AMP and V-POS

Reference Voltage

Mode Detection

Vertical Dynamic Focus

Notes :

1. Provided PLL inhibition input is used, see application diagram on page 27.

2. One for Horizontal section and one for Vertical section.

4/32

9105-02.TBL

Value

15 to 150

1 to 3.7

YES

YES (see note 1)

YES

35 to 200

50 to 165

YES

YES (see note 2)

YES

Unit

kHz

TDA9105

ABSOLUTE MAXIMUM RATINGS

Symbol

Supply Voltage (Pin 18)

Max Voltage on Pins 4, 15, 28, 29, 31, 33, 38, 39, 41, 42

Pin 5

Pins 17, 34

Pin 16

ESD Succeptibility

Human Body Model, 100pF Discharge through 1.5kΩ

EIAJ Norm, 200pF Discharge through 0Ω

Storage Temperature

Max Operating Junction Temperature

Operating Temperature

Parameter

Value

13.5

1.8

300

-40, +150

150

0, +70

Unit

VESD

°C

9105-03.TBL

9105-05.TBL

9105-04.TBL

stg

oper

THERMAL DATA

Symbol

th (j-a)

Parameter

Junction-Ambient Thermal Resistance

Max.

Value

Unit

°C/W

HORIZONTAL SECTION

Operating Conditions

Symbol

VCO

R0min

C0min

Fmax

HsVR

Oscillator Resistor Min Value (Pin 11)

Oscillator Capacitor Min Value (Pin 10)

Maximum Oscillator Frequency

Horizontal Sync Input Voltage (Pin 17)

390

150

5.5

kΩ

kHz

µS

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

INPUT SECTION

MinD

Mduty

Minimum Input Pulses Duration (Pin 17)

Maximum Input Signal Duty Cycle (Pin 17)

0.7

OUTPUT SECTION

I5m

HOI1

HOI2

Maximum Input Peak Current (Pin 5)

Horizontal Drive Output Max Current

Pin 20

Pin 21

Sourced current

Sink current

DC CONTROL VOLTAGES

DCadj

DC Voltage on DC Controls (Pins 4-15)

REF-H

= 8V

5/32

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